
Data Sheet ADP5589
Rev. B | Page 7 of 52
QUICK DEVICE OVERVIEW
ROW 0
SDA
FIFO
UPDATE
UVLO
POR
I
2
C INTERFACE
I
2
C BUSY?
OSCILLATOR
REGISTERS
KEY SCAN
AND
DECODE
GPI SCAN
AND
DECODE
LOGIC 1
I/O
CONFIGURATION
INT
RST
ROW 1
ROW 2
ROW 3
ROW 4
ROW 5
ROW 6
ROW 7
COL 1
COL 0
COL 2
COL 3
COL 4
COL 5
COL 6
COL 7
COL 8
COL 10
COL 9
(R0)
(R1)
(R2)
(R3)
(R4)
(R5)
(R6)
(R7)
(C0)
(C1)
(C2)
(C3)
(C4)
(C5)
(C6)
(C7)
(C8)
(C9)
(C10)
(R0)
(R1)
(R2)
(R3)
(R1)
(R2)
(R3)
(R0)
(R4)
(R5)
(R6)
(R7)
(C0)
(C1)
(C2)
(C3)
(C4)
(C5)
(C6)
(R3)
(C6)
(C7)
(C8)
(C9)
(C6)
(C7)
(C8)
(C9)
(C10)
GPIO 1
LA1
GPIO 2
GPIO 3
GPIO 4
GPIO 5
GPIO 6
GPIO 7
GPIO 8
GPIO 9
GPIO 10
GPIO 11
GPIO 12
GPIO 13
GPIO 14
GPIO 15
GPIO 16
GPIO 17
GPIO 18
GPIO 19
LB1
LC1
LY1
LA2
LB2
LC2
LY2
LOGIC 2
CLK DIV
CLK_IN
CLK_OUT
PWM
(R3)
(C6)
PWM_IN
PWM_OUT
(R4)
RESET1
(C4)
RESET2
KEY EVENT
GPI EVENT
LOGIC EVENT
SCL
DD
ADP5589
GND
R0
R3
R1
R2
R4
R7
R5
R6
C0
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
RESET1
GEN
RESET2
GEN
RST
9714-004
Figure 5. Internal Block Diagram
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